rename typed_ir::Block to Body
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5dca566cca
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@ -43,7 +43,7 @@ impl CompileError {
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#[derive(Debug)]
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pub struct Module {
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pub blocks: Vec<typed_ir::Block>,
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pub blocks: Vec<typed_ir::Body>,
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}
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pub struct Context {
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@ -276,7 +276,7 @@ impl Context {
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fn type_comb(
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&mut self,
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comb: &parser::comb::CombBlock,
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) -> Result<typed_ir::Block, CompileError> {
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) -> Result<typed_ir::Body, CompileError> {
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let mut signals = Vec::new();
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let callable_id = self.callable_from_block(comb)?;
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@ -296,7 +296,7 @@ impl Context {
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let root_expr = self.type_expression(&comb.expr)?;
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Ok(typed_ir::Block {
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Ok(typed_ir::Body {
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signature: callable_id,
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signals,
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expr: root_expr,
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@ -109,7 +109,7 @@ fn lower_expression(
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fn lower_comb(
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ctx: &mut Context,
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module: &mut rtlil::Module,
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block: &typed_ir::Block,
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block: &typed_ir::Body,
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) -> Result<(), CompileError> {
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for (num, sig) in block.signals.iter().enumerate() {
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let sig_id = format!("\\$sig_{}", sig.id.0);
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@ -134,7 +134,7 @@ fn lower_comb(
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Ok(())
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}
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pub fn lower_block(context: &mut Context, block: &typed_ir::Block) -> Result<String, CompileError> {
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pub fn lower_block(context: &mut Context, block: &typed_ir::Body) -> Result<String, CompileError> {
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let mut writer = rtlil::ILWriter::new();
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let mut ir_module = rtlil::Module::new(make_pubid("test"));
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@ -5,7 +5,7 @@ impl Context {
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pub fn pretty_typed_block(
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&self,
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w: &mut dyn std::fmt::Write,
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block: &typed_ir::Block,
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block: &typed_ir::Body,
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) -> std::fmt::Result {
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let callsig = self.callables.get(block.signature);
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{
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@ -3,7 +3,7 @@ use super::types;
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use super::Context;
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impl Context {
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pub fn infer_types(&mut self, mut block: typed_ir::Block) -> typed_ir::Block {
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pub fn infer_types(&mut self, mut block: typed_ir::Body) -> typed_ir::Body {
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let new_root = self.infer_expr_types(&block.expr);
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block.expr = new_root;
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block
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@ -57,7 +57,7 @@ pub struct Signal {
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/// A block of HDL code, e.g. comb block
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#[derive(Debug, Clone)]
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pub struct Block {
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pub struct Body {
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pub signature: CallableId,
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pub signals: Vec<Signal>,
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pub expr: Expr,
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