start reworking syntax for stdlib

lib/builtins/main.hyd

@@ -0,0 +1,7 @@
+
+
+module reduce_or (
+	a: Logic
+	)
+	-> Logic<1> {
+}

src/frontend.rs

@@ -285,7 +285,7 @@ fn lower_assignment(
 
 pub fn lower_module(pa_module: parser::Module) -> Result<String, CompileError> {
     let mut writer = rtlil::ILWriter::new();
-    let mut ir_module = rtlil::Module::new(make_pubid(pa_module.name));
+    let mut ir_module = rtlil::Module::new(make_pubid(pa_module.name.fragment()));
     let mut context = Context {
         callables: get_builtins()
             .into_iter()
@@ -297,17 +297,18 @@ pub fn lower_module(pa_module: parser::Module) -> Result<String, CompileError> {
 
     writer.write_line("autoidx 1");
     for (idx, port) in pa_module.ports.iter().enumerate() {
-        let sigtype = TypeStruct::logic_width(port.net.width.unwrap_or(1) as u32);
+        // FIXME: Actually resolve types
+        let sigtype = TypeStruct::logic_width(TODO_WIDTH);
         // FIXME: CRIMES CRIMES CRIMES
         let sigtype = Box::leak(Box::new(sigtype));
         let sig = Signal {
-            name: port.net.name.to_owned(),
-            il_id: make_pubid(port.net.name),
+            name: port.net.name.fragment().to_string(),
+            il_id: make_pubid(port.net.name.fragment()),
             typ: sigtype,
         };
         let sig = context
             .signals
-            .entry(port.net.name.to_owned())
+            .entry(port.net.name.fragment().to_string())
             .or_insert(sig);
 
         let dir_option = match port.direction {
@@ -316,7 +317,7 @@ pub fn lower_module(pa_module: parser::Module) -> Result<String, CompileError> {
         };
         let wire = rtlil::Wire::new(
             sig.il_id.to_owned(),
-            port.net.width.unwrap_or(1) as u32,
+            TODO_WIDTH,
             Some(dir_option),
         );
         ir_module.add_wire(wire);

src/package.rs

@@ -9,7 +9,7 @@ pub struct Package {
 
 impl Package {
     pub fn open(&self) -> Result<File, std::io::Error> {
-        let filepath = self.path.with_file_name("main.hyd");
+        let filepath = self.path.join("main.hyd");
         File::open(filepath)
     }
 }

src/parser.rs

@@ -38,6 +38,22 @@ fn identifier(input: Span) -> IResult<Span, Span> {
     ))(input)
 }
 
+// TODO: allow recursive generics
+fn typename(input: Span) -> IResult<Span, TypeName> {
+    map(
+        tuple((
+            identifier,
+            opt(delimited(char('<'), ws0(expression), char('>')))
+        )),
+        |(ident, _)| {
+            TypeName {
+                name: ident,
+                generics: ()
+            }
+        }
+    )(input)
+}
+
 fn widthspec(input: Span) -> IResult<Span, u64> {
     delimited(char('['), ws0(decimal), char(']'))(input)
 }
@@ -46,10 +62,16 @@ fn intliteral(input: Span) -> IResult<Span, (u64, u64)> {
     tuple((terminated(decimal, char('\'')), alt((decimal, hexadecimal))))(input)
 }
 
+#[derive(Debug)]
+pub struct TypeName<'a> {
+    name: Span<'a>,
+    generics: (),
+}
+
 #[derive(Debug)]
 pub struct NetDecl<'a> {
-    pub name: &'a str,
-    pub width: Option<u64>,
+    pub name: Span<'a>,
+    pub typ: TypeName<'a>,
     pub value: Option<(u64, u64)>,
 }
 
@@ -93,14 +115,12 @@ pub enum Expression<'a> {
 fn declaration(i: Span) -> IResult<Span, NetDecl> {
     map(
         tuple((
-            ws0(alt((tag("reg"), tag("wire")))),
-            opt(ws0(widthspec)),
-            identifier,
+            separated_pair(identifier, ws0(char(':')), typename),
             opt(preceded(ws0(char('=')), intliteral)),
         )),
-        |(_, width, ident, value)| NetDecl {
-            name: ident.fragment(),
-            width,
+        |((ident, typ), value)| NetDecl {
+            name: ident,
+            typ,
             value,
         },
     )(i)
@@ -172,7 +192,7 @@ fn assign_statement(input: Span) -> IResult<Span, Assign> {
 }
 
 pub fn parse(input: Span) -> IResult<Span, Module> {
-    module(input)
+    ws0(module)(input)
 }
 
 #[cfg(test)]

src/parser/module.rs

@@ -4,14 +4,14 @@ use nom::{
     character::complete::{char, multispace1},
     combinator::{consumed, map},
     error::context,
-    multi::{many1, separated_list0},
-    sequence::{delimited, terminated, tuple},
+    multi::{many0, separated_list0},
+    sequence::{delimited, terminated, tuple, preceded},
 };
 
 use crate::parser::{
     assign_statement, declaration, identifier,
     proc::{proc_block, ProcBlock},
-    ws0, Assign, IResult, NetDecl, Span,
+    ws0, Assign, IResult, NetDecl, Span, typename
 };
 
 #[derive(Debug)]
@@ -29,7 +29,7 @@ pub struct PortDecl<'a> {
 
 #[derive(Debug)]
 pub struct Module<'a> {
-    pub name: &'a str,
+    pub name: Span<'a>,
     pub ports: Vec<PortDecl<'a>>,
     pub items: Vec<ModuleItem<'a>>,
 }
@@ -42,22 +42,18 @@ pub enum ModuleItem<'a> {
 
 fn port_decl(i: Span) -> IResult<Span, PortDecl> {
     map(
-        consumed(tuple((
-            alt((
-                map(tag("input"), |_| PortDirection::Input),
-                map(tag("output"), |_| PortDirection::Output),
-            )),
+        consumed(
             declaration,
-        ))),
-        |(pos, (direction, net))| PortDecl {
+        ),
+        |(pos, net)| PortDecl {
             pos,
-            direction,
+            direction: PortDirection::Input,
             net,
         },
     )(i)
 }
 
-fn ports_list(input: Span) -> IResult<Span, Vec<PortDecl>> {
+fn inputs_list(input: Span) -> IResult<Span, Vec<PortDecl>> {
     separated_list0(ws0(char(',')), ws0(port_decl))(input)
 }
 
@@ -87,12 +83,14 @@ pub fn module(input: Span) -> IResult<Span, Module> {
             tuple((
                 tag("module"),
                 ws0(identifier),
-                ws0(delimited(char('('), ws0(ports_list), char(')'))),
-                ws0(delimited(char('{'), many1(ws0(module_item)), char('}'))),
+                ws0(delimited(char('('), ws0(inputs_list), char(')'))),
+                ws0(preceded(tag("->"), ws0(typename))),
+                ws0(delimited(char('{'), ws0(many0(ws0(module_item))), char('}'))),
             )),
-            |(_, name, ports, items)| Module {
-                name: (*name.fragment()),
-                ports,
+            |(_, name, inputs, ret, items)| Module {
+                name,
+                // TODO: add back in returns
+                ports: inputs,
                 items,
             },
         ),