start reworking syntax for stdlib

main
NotAFile 2022-01-24 00:10:09 +01:00
parent 0d9abac065
commit 7fea40208d
5 changed files with 60 additions and 34 deletions

7
lib/builtins/main.hyd Normal file
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@ -0,0 +1,7 @@
module reduce_or (
a: Logic
)
-> Logic<1> {
}

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@ -285,7 +285,7 @@ fn lower_assignment(
pub fn lower_module(pa_module: parser::Module) -> Result<String, CompileError> { pub fn lower_module(pa_module: parser::Module) -> Result<String, CompileError> {
let mut writer = rtlil::ILWriter::new(); let mut writer = rtlil::ILWriter::new();
let mut ir_module = rtlil::Module::new(make_pubid(pa_module.name)); let mut ir_module = rtlil::Module::new(make_pubid(pa_module.name.fragment()));
let mut context = Context { let mut context = Context {
callables: get_builtins() callables: get_builtins()
.into_iter() .into_iter()
@ -297,17 +297,18 @@ pub fn lower_module(pa_module: parser::Module) -> Result<String, CompileError> {
writer.write_line("autoidx 1"); writer.write_line("autoidx 1");
for (idx, port) in pa_module.ports.iter().enumerate() { for (idx, port) in pa_module.ports.iter().enumerate() {
let sigtype = TypeStruct::logic_width(port.net.width.unwrap_or(1) as u32); // FIXME: Actually resolve types
let sigtype = TypeStruct::logic_width(TODO_WIDTH);
// FIXME: CRIMES CRIMES CRIMES // FIXME: CRIMES CRIMES CRIMES
let sigtype = Box::leak(Box::new(sigtype)); let sigtype = Box::leak(Box::new(sigtype));
let sig = Signal { let sig = Signal {
name: port.net.name.to_owned(), name: port.net.name.fragment().to_string(),
il_id: make_pubid(port.net.name), il_id: make_pubid(port.net.name.fragment()),
typ: sigtype, typ: sigtype,
}; };
let sig = context let sig = context
.signals .signals
.entry(port.net.name.to_owned()) .entry(port.net.name.fragment().to_string())
.or_insert(sig); .or_insert(sig);
let dir_option = match port.direction { let dir_option = match port.direction {
@ -316,7 +317,7 @@ pub fn lower_module(pa_module: parser::Module) -> Result<String, CompileError> {
}; };
let wire = rtlil::Wire::new( let wire = rtlil::Wire::new(
sig.il_id.to_owned(), sig.il_id.to_owned(),
port.net.width.unwrap_or(1) as u32, TODO_WIDTH,
Some(dir_option), Some(dir_option),
); );
ir_module.add_wire(wire); ir_module.add_wire(wire);

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@ -9,7 +9,7 @@ pub struct Package {
impl Package { impl Package {
pub fn open(&self) -> Result<File, std::io::Error> { pub fn open(&self) -> Result<File, std::io::Error> {
let filepath = self.path.with_file_name("main.hyd"); let filepath = self.path.join("main.hyd");
File::open(filepath) File::open(filepath)
} }
} }

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@ -38,6 +38,22 @@ fn identifier(input: Span) -> IResult<Span, Span> {
))(input) ))(input)
} }
// TODO: allow recursive generics
fn typename(input: Span) -> IResult<Span, TypeName> {
map(
tuple((
identifier,
opt(delimited(char('<'), ws0(expression), char('>')))
)),
|(ident, _)| {
TypeName {
name: ident,
generics: ()
}
}
)(input)
}
fn widthspec(input: Span) -> IResult<Span, u64> { fn widthspec(input: Span) -> IResult<Span, u64> {
delimited(char('['), ws0(decimal), char(']'))(input) delimited(char('['), ws0(decimal), char(']'))(input)
} }
@ -46,10 +62,16 @@ fn intliteral(input: Span) -> IResult<Span, (u64, u64)> {
tuple((terminated(decimal, char('\'')), alt((decimal, hexadecimal))))(input) tuple((terminated(decimal, char('\'')), alt((decimal, hexadecimal))))(input)
} }
#[derive(Debug)]
pub struct TypeName<'a> {
name: Span<'a>,
generics: (),
}
#[derive(Debug)] #[derive(Debug)]
pub struct NetDecl<'a> { pub struct NetDecl<'a> {
pub name: &'a str, pub name: Span<'a>,
pub width: Option<u64>, pub typ: TypeName<'a>,
pub value: Option<(u64, u64)>, pub value: Option<(u64, u64)>,
} }
@ -93,14 +115,12 @@ pub enum Expression<'a> {
fn declaration(i: Span) -> IResult<Span, NetDecl> { fn declaration(i: Span) -> IResult<Span, NetDecl> {
map( map(
tuple(( tuple((
ws0(alt((tag("reg"), tag("wire")))), separated_pair(identifier, ws0(char(':')), typename),
opt(ws0(widthspec)),
identifier,
opt(preceded(ws0(char('=')), intliteral)), opt(preceded(ws0(char('=')), intliteral)),
)), )),
|(_, width, ident, value)| NetDecl { |((ident, typ), value)| NetDecl {
name: ident.fragment(), name: ident,
width, typ,
value, value,
}, },
)(i) )(i)
@ -172,7 +192,7 @@ fn assign_statement(input: Span) -> IResult<Span, Assign> {
} }
pub fn parse(input: Span) -> IResult<Span, Module> { pub fn parse(input: Span) -> IResult<Span, Module> {
module(input) ws0(module)(input)
} }
#[cfg(test)] #[cfg(test)]

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@ -4,14 +4,14 @@ use nom::{
character::complete::{char, multispace1}, character::complete::{char, multispace1},
combinator::{consumed, map}, combinator::{consumed, map},
error::context, error::context,
multi::{many1, separated_list0}, multi::{many0, separated_list0},
sequence::{delimited, terminated, tuple}, sequence::{delimited, terminated, tuple, preceded},
}; };
use crate::parser::{ use crate::parser::{
assign_statement, declaration, identifier, assign_statement, declaration, identifier,
proc::{proc_block, ProcBlock}, proc::{proc_block, ProcBlock},
ws0, Assign, IResult, NetDecl, Span, ws0, Assign, IResult, NetDecl, Span, typename
}; };
#[derive(Debug)] #[derive(Debug)]
@ -29,7 +29,7 @@ pub struct PortDecl<'a> {
#[derive(Debug)] #[derive(Debug)]
pub struct Module<'a> { pub struct Module<'a> {
pub name: &'a str, pub name: Span<'a>,
pub ports: Vec<PortDecl<'a>>, pub ports: Vec<PortDecl<'a>>,
pub items: Vec<ModuleItem<'a>>, pub items: Vec<ModuleItem<'a>>,
} }
@ -42,22 +42,18 @@ pub enum ModuleItem<'a> {
fn port_decl(i: Span) -> IResult<Span, PortDecl> { fn port_decl(i: Span) -> IResult<Span, PortDecl> {
map( map(
consumed(tuple(( consumed(
alt((
map(tag("input"), |_| PortDirection::Input),
map(tag("output"), |_| PortDirection::Output),
)),
declaration, declaration,
))), ),
|(pos, (direction, net))| PortDecl { |(pos, net)| PortDecl {
pos, pos,
direction, direction: PortDirection::Input,
net, net,
}, },
)(i) )(i)
} }
fn ports_list(input: Span) -> IResult<Span, Vec<PortDecl>> { fn inputs_list(input: Span) -> IResult<Span, Vec<PortDecl>> {
separated_list0(ws0(char(',')), ws0(port_decl))(input) separated_list0(ws0(char(',')), ws0(port_decl))(input)
} }
@ -87,12 +83,14 @@ pub fn module(input: Span) -> IResult<Span, Module> {
tuple(( tuple((
tag("module"), tag("module"),
ws0(identifier), ws0(identifier),
ws0(delimited(char('('), ws0(ports_list), char(')'))), ws0(delimited(char('('), ws0(inputs_list), char(')'))),
ws0(delimited(char('{'), many1(ws0(module_item)), char('}'))), ws0(preceded(tag("->"), ws0(typename))),
ws0(delimited(char('{'), ws0(many0(ws0(module_item))), char('}'))),
)), )),
|(_, name, ports, items)| Module { |(_, name, inputs, ret, items)| Module {
name: (*name.fragment()), name,
ports, // TODO: add back in returns
ports: inputs,
items, items,
}, },
), ),