88 lines
2.2 KiB
Rust
88 lines
2.2 KiB
Rust
use crate::rtlil::{RtlilWrite, SigSpec};
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#[derive(Debug)]
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pub struct Process {
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pub id: String,
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pub root_case: CaseRule,
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pub sync_rules: Vec<SyncRule>,
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}
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#[derive(Debug)]
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pub struct CaseRule {
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pub assign: Vec<(SigSpec, SigSpec)>,
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pub switches: Vec<SwitchRule>,
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}
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#[derive(Debug)]
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pub struct SwitchRule {
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pub signal: SigSpec,
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pub cases: Vec<(SigSpec, CaseRule)>,
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}
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#[derive(Debug)]
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pub struct SyncRule {
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pub cond: SyncCond,
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pub assign: Vec<(SigSpec, SigSpec)>,
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}
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#[derive(Debug)]
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pub enum SyncCond {
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Always,
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Init,
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Posedge(SigSpec),
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Negedge(SigSpec),
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}
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impl RtlilWrite for Process {
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fn write_rtlil(&self, writer: &mut super::ILWriter) {
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writer.write_line(&format!("process {}", self.id));
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writer.indent();
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self.root_case.write_rtlil(writer);
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writer.write_iter(&self.sync_rules);
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writer.dedent();
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writer.write_line("end");
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}
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}
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impl RtlilWrite for CaseRule {
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fn write_rtlil(&self, writer: &mut super::ILWriter) {
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for assign in &self.assign {
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writer.write_line(&format!("assign {} {}", assign.0, assign.1));
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}
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writer.write_iter(&self.switches);
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}
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}
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impl RtlilWrite for SwitchRule {
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fn write_rtlil(&self, writer: &mut super::ILWriter) {
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writer.write_line(&format!("switch {}", self.signal));
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writer.indent();
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for case in &self.cases {
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writer.write_line(&format!("case {}", case.0));
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writer.indent();
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case.1.write_rtlil(writer);
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writer.dedent();
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}
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writer.dedent();
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writer.write_line("end");
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}
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}
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impl RtlilWrite for SyncRule {
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fn write_rtlil(&self, writer: &mut super::ILWriter) {
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let sync_expr = match &self.cond {
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SyncCond::Always => "always".to_owned(),
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SyncCond::Init => "always".to_owned(),
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SyncCond::Posedge(sig) => format!("posedge {}", sig),
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SyncCond::Negedge(sig) => format!("negedge {}", sig),
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};
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writer.write_line(&format!("sync {}", sync_expr));
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writer.indent();
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for update in &self.assign {
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writer.write_line(&format!("update {} {}", update.0, update.1));
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}
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writer.dedent();
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}
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}
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